The Sched app allows you to build your schedule but is not a substitute for your event registration. You must be registered for DPDK Summit 2025 to participate in the sessions. If you have not registered but would like to join us, please go to the event registration pageto purchase a registration.
Please note: This schedule is automatically displayed in Central European Time.To see the schedule in your preferred timezone, please select from the drop-down at the bottom of the menu to the right.
The schedule is subject to change.
Sign up or log in to add sessions to your schedule and sync them to your phone or calendar.
In this presentation, we explore the integration of advanced RISC-V extensions to enhance the performance and efficiency of DPDK.
1. CRC Implementation with Zbc Extension: The RISC-V Zbc extension introduces instructions for carry-less multiplication, which can be leveraged to implement Cyclic Redundancy Check (CRC) in hardware.
2. Efficient Waiting with Zawrs Extension: We demonstrate how to use Zawrs instructions to implement RISC-V-specific versions of the rte_wait_until_equal_* functions, including handling 16-bit values through pointer rounding and bit shifting. The Zawrs extension is also applicable to the DPDK power management library.
3. Prefetching with Zicbop Extension: The RISC-V Zicbop extension introduces instructions for cache block operations, which can be utilized to implement the rte_prefetch* family of functions.
Through detailed examples and performance benchmarks, we illustrate the benefits of these RISC-V extensions in optimising DPDK operations. Attendees will gain insights into the practical implementation of these techniques and their impact on performance and energy efficiency in data plane applications.
Feature arc abstraction[1] primarily aims to solve two use cases for rte_graph based applications: (a) It provides mechanism to add new protocols, as DPDK in-built nodes, which required to be enabled on a per interface basis (Example: IPsec etc.). Here interface refers to both physical port and virtual interface like VLAN/IPIP etc. (b) It also provides mechanism to facilitate application reusing DPDK in-built nodes without any code duplication. It proposes to add hook points in certain in-built nodes where application can eject packets (at a given networking layer) and may again inject same packet to different networking layer, after processing it.
This session will introduce usability and applicability of feature arc in rte_graph nodes and will try to discuss design decisions taken to achieve the same.
Nitin Saxena is working as a senior principal engineer at Marvell Technology, where he contributes to offload networking solutions to hardware. He has 18+ years of experience in LINUX, FD.io VPP, OVS and DPDK networking. He is passionate about software/hardware technologies that minimise... Read More →